Articles

Pascal Roques is a senior consultant and trainer who has been modeling for more than twenty five years in various domains. He began with SADT and OMT, then moved to UML (OCUP Advanced Certification) and RUP in Valtech, where he was in charge of the Modeling part of the training catalog. Pascal is now working on his own at PRFC [www.prfc.fr], mainly in the field of Systems Modeling with SysML. He is also co-founder of SysML France association, and published several books on UML and SysML in French.

• Modeling Requirements with SysML

Bastian Tenbergen is an Assistant Professor for Computer Science at the State University of New York at Oswego. He has co-authored articles and contributed to several books in the area of Software Engineering. Bastian’s main research focus is on Model-Based Requirements Engineering, Context Analysis, and Safety of Embedded and Cyber-Physical Systems. He has many years of project and consulting experience and has worked closely with industry.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Andreas Vogelsang is a post-doc researcher in the software & systems engineering group at the Technical University of Munich. He works on model-based requirements engineering and participated in several research collaborations with industrial partners especially from the automotive industry. His research published was published in relevant international conferences like RE, REFSQ, or ICSE.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Thorsten Weyer is a research group leader at the University of Duisburg-Essen. He has been a member of organization committees, program committees and reviewer for scientific conferences and journals. Thorsten gives regular lectures at the University and is an experienced conference speaker. He has also held several leading positions in research projects and technology transfer projects. He is member of the IREB council and head of the IREB working group Requirements Modeling.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Andreas Froese works as a research assistant in the working group Software Systems Engineering (Prof. Dr. Klaus Pohl) at the University of Duisburg-Essen. He worked in several research projects where he was able to expand his knowledge in the domain of Requirements Engineering for software-intensive Embedded Systems, as well as in those of model-based Context Analysis and context-based Quality Assurance.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Jan Christoph Wehrstedt works as a mathematician at the Technology Field Automation & Control at Siemens Corporate Technology. Currently he is Senior Key Expert for Efficient Simulation Driven System Development. He is the project manager of several business (Siemens internal) and public funded projects dealing with the integration of simulation and modeling approaches towards a simulation based engineering of technical systems and plants and it’s embedding into PLM lifecycle and tools.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Veronika Brandstetter is a mathematician in the Technology Field Automation & Control at Siemens Corporate Technology. She is developing methods for seamless engineering and improved operation of technical systems based on simulation. Recently, she focused on simulation based design for manufacturing technologies. She has been working in various Siemens internal research projects as well as in publicly funded projects also managing part of them in different groups within the Technology Field.

• Modeling Requirements and Context as a means for Automated Requirements Validation

Gildas PREMEL-CABIC works as a Business Analyst at Capgemini (France). Gildas holds the IREB CPRE foundation level certificate. His business domain is the use of simulation for Defence activities. His main domain of interest concerns system modeling and simulation.

• Discovering System Requirements through SysML